Our IC substrate solutions of today are enabling the high density designs of the future.

IC substrates are the critical interfaces between the semiconductor chip and the printed circuit board onto which they are assembled.  Fabricators of these IC substrates require the capability to deliver interconnect densities far beyond that of the typical printed circuit board fabricator. To successfully build these complex designs, manufacturers require a partner with proven solutions and specialty chemical expertise in high density designs. We are that solutions provider.

Systek

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Our Systek line of IC substrate chemicals provides the solutions for the most technically challenging requirements of today’s high density designs. No other company has the breadth of chemistries and technical expertise to meet the most stringent requirements while achieving higher productivity at economical costs.

The Systek portfolio of chemistries has been optimized for the challenges of IC substrate fabrication and can be seamlessly integrated into existing manufacturing operations with minimal equipment modifications. Coupled with an unparalleled team of global applications specialists, and our intimate understanding of the requirements of the industry's largest end-users, we are ideally suited to help you navigate through any unfamiliar or complex IC substrate issue. A worldwide leader in providing proven, innovative chemistries that satisfy both fabricator and OEM requirements, we are the company you can count on for all of your IC substrate chemistry needs.

Systek SAP

Systek SAP is a complete line of products for semi-additive build up of high density designs on rigid and flexible IC substrates. The unique Systek SAP conditioners provide superior electroless copper coverage and adhesion to the build up substrates. The sulfuric acid free Systek SAP glass etch technology uniformly frosts glass fillers without excessive attack and increased roughness enhancing electroless copper coverage and adhesion. The ultra-thin conductive seed layer created by the no stress Systek SAP electroless copper provides a blister-free deposit on build up films resulting in maximum adhesion on all surfaces. The result is void free filling of blind microvias, uniform copper thickness in hard-to-plate areas, and the high peel strengths needed for fine line reliability. The entire Systek SAP process can operate in standard equipment with optimum performance. 

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Systek UVF 100

The build up of redistribution layers in IC substrate manufacturing requires the metallization of various features within very tight specifications from a single solution. These include filled blind microvias, filled laser drilled X-vias, and fine lines and pads. The Systek UVF 100 is specifically designed for the 2-in-1 RDL plating of IC substrate features. The precise chemical system fills blind microvias and X-vias with minimal dimples or overfill, eliminating the concern of dielectric thinning while providing an excellent base for further stacking. At the same time, the process also plates lines, pads, and other surface features with high coplanarity and low trace profiles resulting in an optimal final copper surface for the layer. The Systek UVF 100 is a production-proven 2 in 1 pattern plating copper metallization that enables panel-level packaging IC substrate designs.

Systek ETS 1200

Systek ETS 1200 is an advanced DC acid copper pattern plating process specifically formulated to plate fine lines and pads in embedded trace substrates. Embedded trace substrate technology is a panel-level packaging solution that enables very high density outerlayers on organic IC substrates. The Systek ETS 1200 process excels at plating the trace profile tolerances and coplanarity requirements of die to IC substrate interfaces.

Coplanar Plating of Very High Density Designs. R-values below 2 µm for lines and spaces as low as 5/5 µm enabling innovative new IC substrate design capabilities.

Electrically Isolated Trace Performance. Encased high density routing with square trace profiles for extremely low impedance / improved electrical tolerances.

Excellent Deposit Properties.  Very low stress deposit that exceeds IPC Class III tensile and elongation standards for durable interconnections with no warpage.

3-Component CVS Analyzable System. Allows for worry free operation, greatly increasing quality and consistency of performance.

 

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The square trace profile, and extreme coplanarity of features plated with Systek ETS 1200 enable performance and density beyond what is possible with conventional organic substrate manufacturing technologies.

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